Enable support for Intel's AES instruction set (AES-NI)

Other “cpu_flags_x86” USE_EXPAND flag values

Use FlagDescription
cpu_flags_x86_3dnowUse the 3DNow! instruction set
cpu_flags_x86_3dnowextUse the Enhanced 3DNow! instruction set
cpu_flags_x86_aesEnable support for Intel's AES instruction set (AES-NI)
cpu_flags_x86_avxAdds support for Advanced Vector Extensions instructions
cpu_flags_x86_avx2Adds support for Advanced Vector Extensions 2 instructions
cpu_flags_x86_avx512_4fmapsUse AVX-512 Fused Multiply-Accumulate Packed Single Precision instruction set
cpu_flags_x86_avx512_4vnniwUse AVX-512 Vector Neural Network Instructions Word Variable Precision
cpu_flags_x86_avx512_bf16Use AVX-512 BFloat16 instruction set
cpu_flags_x86_avx512_bitalgUse AVX-512 Bit Algorithms instruction set
cpu_flags_x86_avx512dqUse AVX-512 double- and quad-word instructions
cpu_flags_x86_avx512fAdds support for AVX-512 Foundation instructions
cpu_flags_x86_avx512_fp16Use general-purpose numeric operations for 16-bit half-precision instruction set
cpu_flags_x86_avx512ifmaUse AVX-512 Integer Fused Multiply-Add instruction set
cpu_flags_x86_avx512_vbmi2Use AVX-512 Vector Bit Manipulation Instructions 2
cpu_flags_x86_avx512vlUse AVX-512 vector-length instructions
cpu_flags_x86_avx512_vnniUse vector neural network instructions for 8- and 16-bit multiply-add operations
cpu_flags_x86_avx512_vp2intersectUse AVX-512 Intersect instruction set
cpu_flags_x86_avx512_vpopcntdqUse AVX-512 Vector Population Count Doubleword and Quadword instruction set
cpu_flags_x86_f16cAdds support for F16C instruction set for converting between half-precision and single-precision floats
cpu_flags_x86_fma3Use the Fused Multiply Add 3 instruction set ([fma] in cpuinfo)
cpu_flags_x86_fma4Use the Fused Multiply Add 4 instruction set
cpu_flags_x86_mmxUse the MMX instruction set
cpu_flags_x86_mmxextUse the Extended MMX instruction set (a subset of SSE) ([mmxext] or [sse] in cpuinfo)
cpu_flags_x86_padlockUse VIA padlock instructions ([phe] in cpuinfo)
cpu_flags_x86_pclmulUse Carry-less Multiplication instructions ([pclmulqdq] in cpuinfo)
cpu_flags_x86_popcntEnable popcnt instruction support ([abm] or [popcnt] in cpuinfo)
cpu_flags_x86_rdrandUse the RDRAND instruction for generating random numbers
cpu_flags_x86_shaUse the SHA-NI instruction set
cpu_flags_x86_sseUse the SSE instruction set
cpu_flags_x86_sse2Use the SSE2 instruction set
cpu_flags_x86_sse3Use the SSE3 instruction set ([pni] in cpuinfo, NOT ssse3)
cpu_flags_x86_sse4_1Enable SSE4.1 instruction support
cpu_flags_x86_sse4_2Enable SSE4.2 instruction support
cpu_flags_x86_sse4aEnable SSE4a instruction support
cpu_flags_x86_ssse3Use the SSSE3 instruction set (NOT sse3/pni)
cpu_flags_x86_vpclmulqdqUse Vector Carry-Less Multiplication of Quadwords instruction set
cpu_flags_x86_xopEnable the XOP instruction set

All packages providing a “cpu_flags_x86_aes” USE flag (17)